搜索资源列表
sdram_control_burst
- 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
mt48lc2m32b2
- the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram - mt48lc2m32b2 d evice.
sdram_verilog
- 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic
CommandResponse
- verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
sdr_data_path
- SDRAM控制器Verilog员代码，数据链路模块，完成和顶层模块的数据交换-SDRAM controller member Verilog code, data link module, Top module completed and the data exchange
Params
- SDRAM控制器Verilog员代码，设计参数模块，整个模块的所有参数定义-SDRAM controller member Verilog code, design parameter module, the entire module of all parameters defined
control_interface
- SDRAM控制器Verilog员代码，控制接口模块，完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
Commandinterface
- SDRAM控制器Verilog员代码，命令生成模块，完成SDRAM控制接口命令的生成-SDRAM controller member Verilog code, order generation module, SDRAM interface complete control orders Generation
Sdram_Control_4Port
- ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。
ddr_ctrl
- verilog hdl coding DDR sdram control for fpga
SDR_4Mx16_HY57V641620HG_verilogl
- Hynix公司8M byte sdr sdram的verilog语言仿真实现。
mem_ctrl.tar
- verilog 写的 memory controller ，可以控制SDRAM SRAM NOR
SDRAM-and-FIFO-for-DE1-SoC-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
11_ddr3_test
- fpga ddr3 sdram verilog 黑金的板子(fpga ddr3 sdram verilog)
DDR_MO
- 使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
sdram_verilog
- verilog实现外部sdram读写功能，实测可用(SDRAM read and write function by verilog)
ov7670_sdram_lcd
- ov7670采集图像信息，缓存到SDRAM内部，再输出到lcd显示屏来显示出来。(Ov7670 collects image information, caches inside SDRAM, and then outputs it to the LCD display to display it.)
sdram_640X480_full
- 基于FPGA的640*480的sdram项目，使用verilog语言，教学项目教学项目(The SDRAM project of 640*480 based on FPGA, the use of the Verilog language, the teaching project teaching project)
DDR_sdram
- 文件里有DDR3/DDR4 sram的verliog模型，而且具有DDR4参考书(The document has a verliog model of DDR3/DDR4 SRAM, and it has DDR4 reference books.)
sdram控制
- sdram控制，verilog代码，实现sdram控制底层操作接口